The IRQ pin is used to indicate that there is one (or more) pending interrupt that has been enabled through the IRQ_MASK register. The IRQ pin is also used to indicate that the SPI slave is ready to receive the second transaction of an ongoing SPI command sequence.

The IRQ pin will always go high (inactive) after a successful SPI transaction. If any interrupts are pending, or when the chip is ready for the second transaction in a SPI command sequence it will be indicated through a high-to-low transition on the IRQ pin.

SYS_RESTARTED

Asserted when a system restart occurs. For example after an update of the Vision Controller. If some additional SPI config is used you must reconfigure it. In order to detect the next restart, this flag must be cleared.

RX_DMX_IRQ

Asserted when a complete DMX frame has been received and any slot within the DMX window has changed value. Cleared by issuing a READ_DMX command sequence.

RX_RDM_IRQ

Asserted when a complete RDM frame has been received. Cleared by issuing a READ_RDM command sequence.

NFC_WAKEUP

Asserted when the controller wakes up through NFC.

RF_LINK_IRQ

Asserted when a network value is changed. In order to show the actual Network Information. Cleared by issuing a READ_REG of NETWORKSTATE or STATUS.

DFU_START_IRQ

Asserted when a DFU Update requested. DFU Response required(Write DFU) .Cleared by issuing a DFU Response.

DFU_PACKET_IRQ

Asserted when a DFU Packet received. This packet must be read (Read DFU). Cleared by issuing a Read DFU.

DFU_STOP_IRQ

Asserted when DFU is finished and no further package. DFU Response required (Write DFU). Cleared by issuing a DFU Response.